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Intel
Pentium 4 2.2A (Northwood)
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|
Author : Wayne
Date : 4th March 2002
|
| ...Product |
Pentium4 2.2A |
| ...Manufacturer |
Intel |
| ...Supplier |
Intel |
| ...Price |
£557.00
approx @ Scan |

Northwood, what it means to you :
One gripe that some people had with Intel was
the switch from their Socket 423 format to the new Socket 478.
The good news is that Intel has no plans to drop Socket 478
any time soon ensuring a smooth upgrade path for the foreseeable
future. Users who currently own mPGA 478-pin may need to look
at updating the BIOS in order to run these new speeds, but the
fact that the CPU is pin compatible will no doubt come as a
great relief.
As you'd expect then, the Northwood P4's come
in a 478 pin package. They also feature the now trademark heatspreader
which does what the name suggests, it helps to draw heat away
from the core and allows for a greater contact area with your
heat sink. Not only does this mean more efficient cooling, it
also means the core is massively better protected than that
found on the Athlon range of CPUs. If there's one thing you
really don't have to worry about when you buy Intel it's cracked
and chipped cores.
The image below shows how the CPU arrived in a
socket 479 blank which Intel assures us is used to protect the
pins only and is not a subliminal hint that Socket 479 is on
the horizon.

In case you're wondering, the hole in the heat
spreader is used to allow the air inside to expand when heated
without causing damage due to pressure and though its primary
use is during the manufacturing process it also serves to do
the same thing under normal use. Because of its position you'd
have to be pretty careless to get anything in there that would
be likely to do any damage, even a conductive thermal paste
will not do any damage unless you pipe it straight into the
vent hole.

So externally the Northwood P4 is pretty much
identical to every other Socket 478 Williamette core that went
before it. The switch to mPGA 478-pin meant a shrink in package
size and the pins, though tightly packed, are pretty robust
and not easily bent.....comparatively that is.

If you've never actually seen the new 478 pin
package in the flesh before, the first thing to hit home is
just how small the whole deal is. Although the pictures above
are a bit misleading when it comes to judging the actual size,
the image below should give a better idea of the real dimensions.

In fact the real advancements offered by Northwood
are hidden away under the heat spreader. In addition to being
the highest clocked processor available Intel also scored a
first by moving to a new 0.13micron process. While the Williamette
core was built on a 0.18 micron die, all Northwoods now feature
a 0.13 micron dies. Not only does this mean that Intel were
able to lower the voltage requirements, and therefor the heat
output, they were also able to double the amount of L2 cache
from 256k to 512k. The extra L2 cache will impact just about
everything you do, but primarily it will prove a massive benefit
for database and server users where data is forever being regurgitated.
The voltage reductions from around 1.75 volts to Northwood's
leaner 1.50 volts mean we now see the 2.2 boast an impressive
55.1 watt thermal design power, all the more impressive when
we consider the various P4 1.7 steppings ranged from 64.0 to
67.7 watts.
The new 0.13 micron process, which now also uses
much more efficient copper interconnects as opposed to aluminium
used for 0.18 micron dies, also means a great deal more headroom
when it comes to clock speeds and speculation is that we'll
see these cores clocked at 3.0GHz towards the end of this year
or the beginning of 2003. It also allowed Intel engineers to
cram in a remarkable 55 million (60 nanometer) transistors,
some 12 to13 million more than was found on the Willamette core.
Despite all this Intel were still able to reduce core dimensions
from around 217 square millimeters to a miserly 146 square millimeters.
Just for reference lets's take a quick look at
how this fits in with the current range :
|
|
Pentium®
4 Processors in the 423-package
|
Pentium
4 Processors in the 478-pin package
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|
Pentium
4 Processors with 256 KB cache
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Pentium
4 Processors with 512 KB cache
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|
Micro-architecture
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Intel®
NetBurst™
micro-architecture
|
Intel
NetBurst
micro-architecture
|
Intel
NetBurst
micro-architecture
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|
Operating
frequencies (GHz)
|
1.3,
1.4, 1.5, 1.6, 1.7, 1.8, 1.9,
and 2 GHz
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1.5,
1.6, 1.7, 1.8, 1.9,
and 2 GHz
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1.6A,
1.8A, 2A, and 2.2 GHz
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|
Manufacturing
process
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0.18µ
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0.18µ
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0.13µ
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|
L2
Cache size
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256K,
on-die
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256K,
on-die
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512K,
on-die
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|
Socket
Type
|
PGA423
423 pins
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mPGA478B
478 pins
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mPGA478B
478 pins
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|
Memory
Type
|
PC800/600
RDRAM
PC133 SDRAM
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PC800/600
RDRAM
PC133 SDRAM
DDR 200/266 SDRAM
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PC800/600
RDRAM
PC133 SDRAM
DDR 200/266 SDRAM
|
|
Chipset
|
Intel®
850 chipset
Intel® 845 chipset
|
Intel
850 chipset
Intel 845 chipset
|
Intel
850 chipset
Intel 845 chipset
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|
Processor
Core Voltage (Vcc_core)
|
1.75
V
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1.75
V
|
1.50V
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|
System
Bus Speed
|
400
MHz
|
400
MHz
|
400
MHz
|
|
Dual
Processor Support
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No
|
No
|
No
|

Other than the things we've covered nothing else
has changed. The core remains identical in its design and function
and offers the same benefits found on its older brothers. I'm
not going to launch in to a full on techno-rant here so let's
just cover the basics.
| Features |
Benefits |
| Processor Core
Speeds Up to and beyond 2.2 GHz |
Maximum performance
for a wide range of emerging Internet, PC and workstation
applications |
| Intel® NetBurst™
Microarchitecture, including: 400-MHz System Bus |
High bandwidth
between the processor and the rest of the system improves
throughput and performance |
| 512-KB L2 Advanced
Transfer Cache |
Enhances performance
by providing fast access to heavily used data and instructions |
| Hyper-Pipelined
Technology |
Extended pipeline
stages significantly increase overall throughput |
| Streaming SIMD
Extensions 2 |
144 new instructions
accelerate operation across a broad range of demanding applications |
| Rapid Execution
Engine |
Arithmetic
Logic Units run at twice the core frequency, speeding execution
in this performance critical area |
| 128-Bit Floating
Point Port |
Floating Point
performance boost provides enhanced 3D visualization and
scientific calculation |
| SIMD 128-bit
Integer |
Accelerates
video, speech, encryption and imaging/photo processing |
| Execution Trace
Cache |
Greatly improves
instruction cache efficiency, maximizing performance on
frequently used sections of software code |
| Advanced Dynamic
Execution |
Improved branch
prediction enhances performance for all 32-bit applications
by optimizing instruction sequences |

Bandwidth -
The Pentium 4 works on a
"quad pumped" internal bus. That is, although the
system bus runs at 100MHz, it is "multiplied" by a
factor of four. This means data is transferred internally at
an incredible 400MHz. The upshot of this is that the P4 has
a full 3.2GB/Second of bandwidth, totally eclipsing Athlon's
maximum of 2.1 GB/Second
Hyper Pipeline -
To enable it to push processor
speeds beyond the 1GHz ceiling encountered using its older P6
architecture, Intel raised the pipeline stages from 10 in the
PIII to 20 in the P4. Occasionally however, data in that pipeline
will need to be flushed and the more stages there are, the more
data gets flushed (up to 126 instructions in fact) and the longer
it takes to refill. Use of the execution trace cache aims to
keep these occurrences to a minimum, but when they do occur
the delays can be significant, in processor terms at least.
SSE2 -
SSE2 adds 140 new instructions
to the original SSE set. Some will claim that SSE2 is nothing
more than SSE should have originally been, but regardless of
that its power and flexibility is now huge. This is probably
just as well because one of the other parts of the P4 architecture
to hit the operating theater floor when it underwent its fat
reduction operation was one of the two floating point units.
This is why we often see such average FPU performance when running
code that can't compensate for this deficit by using SSE2.
The Rapid Execution
Engine -
At the heart of the rapid
execution engine lie two double pumped ALUs and two double pumped
AGUs. These operate at twice the core frequency but are only
able to cope with micro-ops. More complex instructions need
to be channeled through the single slow ALU, and this actually
accounts for the vast majority of data handled.
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